Sharp PC-1350 / PC-1360

Sharp PC-1350 / PC-1360 - assembler

assembler commands
Introduction
Below are all assembler instructions of the ESR-H SC61860 listened. Both with the mnemonic of PKS and those of Hitachi/Sharp.
Instactions



Opcode
PKS
ERS-H
Len
Clock
cz
Effekt (PKS)
Remark



00 XX LD L,n LII n 02 4 .. n→L 
01 XX LD M,n LIJ n 02 4 .. n→M 
02 XX LD A,n LIA n 02 4 .. n→A 
03 XX LD E,n LIB n 02 4 .. n→E 
04 INC S IX 01 6 .. S+1→S, S→X, 5→Q, Sh→H 
05 DEC S DX 01 6 .. S-1→S, S→X, 5→Q, Sl→H 
06 INC D IY 01 6 .. D+1→D, D→X, 7→Q, Dh→H 
07 DEC D DY 01 6 .. D-1→D, D→X, 7→Q, Dl→H 
08 LLD(P),(Q) MVW 01 5+2*I .. (Q)..(Q+L)→(P)..(P+L), P+L+1→P, Q+L+1→Q 
09 LEX(P),(Q) EXW 01 6+3*I (P)..(P+L)↔(Q)..(Q+L), P+L+1→P, Q+L+1→Q 
0A MLD(P),(Q) MVB 01 5+2*J .. (Q)..(Q+M)→(P)..(P+M), P+M+1→P, Q+M+1→Q 
0B MEX(P),(Q) EXB 01 6+3*J .. (P)..(P+M)↔(Q)..(Q+M), P+M+1→P, Q+M+1→Q 
0C LAD(P),A ADN 01 7+3*I cz (P)+A→(P)..(P-L)+c→(P-L), P-L-1→P, BCD 
0D LSD(P),A SBN 01 7+3*I cz (P)-A→(P), (P-L)-c→(P-L), P-L-1→P, BCD 
0E LAD(P),(Q) ADW 01 7+3*I cz (P)+(Q)→(P)..(P-L)+(Q-L)+c→(P-L), P-L-1→P, Q-L-2→Q, BCD 
0F LSD(P),(Q) SBW 01 7+3*I cz (P)-(Q)→(P), (P-L)-(Q-L)-c→(P-L), P-L-1→P, Q-L-2→Q, BCD 
10 XX XX LD X,nm LIDP nm 03 8 .. nm→X, n→H 
11 XX LD XL,n LIDL n 02 5 .. m→Xl, m→H 
12 XX LD P,n LIP n 02 4 .. n→P, 0→H 
13 XX LD Q,n LIQ n 02 4 .. n→Q, n→H 
14 ADD(P) AE ADB 01 5 cz (P)+A→(P), (P+1)+E+c→(P+1), P+1→P 
15 SUB(P) AE SBB 01 5 cz (P)-1→(P), (P+1)-E-c→(P+1), P+1→P 
16 16 16 
17 17 17 
18 LLD(P),(X) MVWD 01 5+4*I .. (X)..(X+L)→(P)..(P+L), P+L+1→P, X+L→X 
19 LEX(P),(X) EXWD 01 7+6*I .. (P)..(P+L)↔(X)..(X+L), P+L+1→P, X+L→X 
1A MLD(P),(X) MVBD 01 5+4*J .. (X)..(X+M)→(P)..(P+M), P+M+1→P, X+M→X 
1B MEX(P),(X) EXBD 01 7+6*J .. (P)..(P+M)↔(X)..(X+M), P+M+1→P, X+M→X 
1C LSR(P) SRW 01 5+I .. (P)>>4 [L+1 bytes], P+L+1→P 
1D LSL(P) SLW 01 5+I .. (P)<<4 [L+1 bytes], P-L-1→P 
1E LLD(P),A FILM 01 5+I .. A→(P)..(P+L), P+L+1→P, A→H 
1F LLD(X),A FILD 01 4+3*I .. A→(X)..(X+L), X+L→X 
20 LD A,P LDP 01 2 .. P→A 
21 LD A,Q LDQ 01 2 .. Q→A 
22 LD A,SP LDR 01 2 .. SP→A 
23 CLR A RA 01 2 .. 0→A, 0→H 
24 LD A,(+S) IXL 01 7 .. S+1→S, S→X, (X)→A, 5→Q 
25 LD A,(-S) DXL 01 7 .. S-1→S, S→X, (X)→A, 5→Q, Sl→H 
26 LD (+D),A IYL 01 7 .. D+1→D, D→X, A→(X), 7→Q 
27 LD (-D),A DYL 01 7 .. D-1→D, D→X, A→(X), 7→Q, Dl→H 
28 XX JP NZ,+n JRNZP n 02 7/4 .. IF z=0 PC+1+n→PC 
29 XX JP NZ,-n JRNZM n 02 7/4 .. IF z=0 PC+1-n→PC 
2A XX JP NC,+n JRNCP n 02 7/4 .. IF c=0 PC+1+n→PC 
2B XX JP NC,-n JRNCM n 02 7/4 .. IF c=0 PC+1-n→PC 
2C XX JP,+n JRP n 02 7 .. PC+1+n→PC 
2D XX JP,-n JRM n 02 7 .. PC+1-n→PC 
2E 2E 2E 
2F XX DJC,-n LOOP n 02 10/7 cz (SP)-1→(SP), IF c=0 PC+1-n→PC (SP-1) used
30 LD P,A STP 01 2 .. A→P, A→H 
31 LD Q,A STQ 01 2 .. A→Q, A→H 
32 LD SP,A STR 01 2 .. A→SP, A→H 
33 33 33 01 2 .. A→H, (theoretically A→S) 
34 PSH A PUSH 01 3 .. A→(SP), SP-1→SP 
35 LLD(P),(AE) DATA 01 11+4*I .. (EA)..(EA+1)→(P)..(P+1) 
36 36 36 
37 RET RTN 01 4 .. (SP-1,SP-2)→PC, SP+2→SP, PC-H→H 
38 XX JP Z,+n JRZP n 02 7/4 .. IF z=1 PC+1+n→PC 
39 XX JP Z,-n JRZM n 02 7/4 .. IF z=1 PC+1-n→PC 
3A XX JP C,+n JRCP n 02 7/4 .. IF c=1 PC+1+n→PC 
3B XX JP C,-n JRCM n 02 7/4 .. IF c=1 PC+1-n→PC 
3C 3C 3C 
3D 3D 3D 
3E 3E 3E 
3F 3F 3F 
40 INC L INCI 01 4 cz L+1→L, 0→Q 
41 DEC L DECI 01 4 cz L-1→L, 0→Q 
42 INC A INCA 01 4 cz A+1→A, 2→Q 
43 DEC A DECA 01 4 cz A-1→A, 2→Q 
44 ADD(P),A ADM 01 3 cz (P)+A→(P) 
45 SUB(P),A SBM 01 3 cz (P)-A→(P) 
46 AND(P),A ANMA 01 3 .z (P)&A→(P) 
47 OR(P),A ORMA 01 3 .z (P)|A→(P) 
48 INC C0 INCK 01 4 cz C0+1→C0, 8→Q 
49 DEC C0 DECK 01 4 cz C0-1→C0, 8→Q 
4A INC C2 INCM 01 4 cz C2+1→C2, 10→Q 
4B DEC C2 DECM 01 4 cz C2-1→C2, 10→Q 
4C LD A,PA INA 01 2 .z Port PA→A 
4D DLY 2 NOPW 01 2 .. none alt: CD/D3/D9
4E XX DLY 6+n WAIT n 02 6+n .. none 
4F LNX WAITI 01 1+4*I .z L→d, REPEAT d-1→d, P+1→P UNTIL L=FF||Xin=1 
50 INC P INCP 01 2 .. P+1→P 
51 DEC P DECP 01 2 .. P-1→P 
52 LD(X),A STD 01 2 .. A→(X) 
53 LD(X),(P) MVDM 01 3 .. (P)→(X) 
54 54 READM 01 3 .. (PC+1)→(P) 
55 LD(P),(X) MVMD 01 3 .. (X)→(P) 
56 56 READ 01 3 .. (PC+1)→A 
57 LD A,(X) LDD 01 3 .. (X)→A 
58 EXD A SWP 01 2 .. [A>>4|A<<4]→A 
59 LD A,(P) LDM 01 2 .. (P)→A 
5A ROL A SL 01 2 c. A<<1, c→A7, A0→c 
5B POP A POP 01 2 .. (SP)→A, SP+1→SP 
5C 5C 5C 
5D OUT PA OUTA 01 3 .. (5C)→Port PA, 5C→Q (?) 
5E 5E 5E 
5F OUT PC OUTF 01 3 .. (5E)→Port PC, 5E→Q (?) 
60 XX AND(P),n ANIM n 02 4 .z (P)&n→(P) 
61 XX OR(P),n ORIM n 02 4 .z (P)|n→(P) 
62 XX BIT(P),n TSIM n 02 4 .z (P)&n 
63 XX CMP(P),n CPIM n 02 4 cz (P)-n 
64 XX AND A,n ANIA n 02 4 .z A&n→A 
65 XX OR A,n ORIA n 02 4 .z A|n→A 
66 XX BIT A,n TSIA n 02 4 .z A&n 
67 XX CMP A,n CPIA n 02 4 cz A-n 
68 68 68 
69 ETJ DTJ 01 5+7*d .z FOR i=1 TO d: IF A=n nm→PC: NEXT i, A→H n,nm are .db statements in most assemblers
6A 6A 6A 
6B XX TST,n TEST n 02 4 .z Test-byte&n 
6C 6C 6C 
6D 6D 6D 
6E 6E 6E 
6F LXP 6F 01 1+4*I .z L→d, REPEAT d-1→d, P+1→P UNTIL L=FF||Xin=0 
70 XX ADD(P),n ADIM n 02 4 cz (P)+n→(P) 
71 XX SUB(P),n SBIM n 02 4 cz (P)-n→(P) 
72 72 72 01 2 .0 H→L, n→H alt: 73/76/77
73 73 73 01 
74 XX ADD A,n ADIA n 02 4 cz A+n→A 
75 XX SUB A,n SBIA n 02 4 cz A-n→A 
76 76 76 
77 77 77 
78 XX XX JSR,nm CALL nm 03 8 .. PC+3→(SP-1,SP-2), SP-2→SP, nm→PC 
79 XX XX JP,nm JP nm 03 6 .. nm→PC 
7A XX XX XX PTJ,n,nm PTJ n,nm 04 9? .. n→d,nm→(SP-1,SP-2), SP-2→SP n,nm are .db statements in most assemblers
7B 7B 7B 01 n/a ? Stops the CPU, possible side effects 
7C XX XX JP NZ,nm JPNZ nm 03 6 .. IF z=0 nm→PC 
7D XX XX JP NC,nm JPNC nm 03 6 .. IF c=0 nm→PC 
7E XX XX JP Z,nm JPZ nm 03 6 .. IF z=1 nm→PC 
7F XX XX JP C,nm JPC nm 03 6 .. IF c=1 nm→PC 
80 LD P,00 LP 00 01 2 .. 00→P, 80→H 
81 LD P,01 LP 01 01 2 .. 01→P, 81→H 
82 LD P,02 LP 02 01 2 .. 02→P, 82→H 
83 LD P,03 LP 03 01 2 .. 03→P, 83→H 
84 LD P,04 LP 04 01 2 .. 04→P, 84→H 
85 LD P,05 LP 05 01 2 .. 05→P, 85→H 
86 LD P,06 LP 06 01 2 .. 06→P, 86→H 
87 LD P,07 LP 07 01 2 .. 07→P, 87→H 
88 LD P,08 LP 08 01 2 .. 08→P, 88→H 
89 LD P,09 LP 09 01 2 .. 09→P, 89→H 
8A LD P,0A LP 0A 01 2 .. 0A→P, 8A→H 
8B LD P,0B LP 0B 01 2 .. 0B→P, 8B→H 
8C LD P,0C LP 0C 01 2 .. 0C→P, 8C→H 
8D LD P,0D LP 0D 01 2 .. 0D→P, 8D→H 
8E LD P,0E LP 0E 01 2 .. 0E→P, 8E→H 
8F LD P,0F LP 0F 01 2 .. 0F→P, 8F→H 
90 LD P,10 LP 10 01 2 .. 10→P, 90→H 
91 LD P,11 LP 11 01 2 .. 11→P, 91→H 
92 LD P,12 LP 12 01 2 .. 12→P, 92→H 
93 LD P,13 LP 13 01 2 .. 13→P, 93→H 
94 LD P,14 LP 14 01 2 .. 14→P, 94→H 
95 LD P,15 LP 15 01 2 .. 15→P, 95→H 
96 LD P,16 LP 16 01 2 .. 16→P, 96→H 
97 LD P,17 LP 17 01 2 .. 17→P, 97→H 
98 LD P,18 LP 18 01 2 .. 18→P, 98→H 
99 LD P,19 LP 19 01 2 .. 19→P, 99→H 
9A LD P,1A LP 1A 01 2 .. 1A→P, 9A→H 
9B LD P,1B LP 1B 01 2 .. 1B→P, 9B→H 
9C LD P,1C LP 1C 01 2 .. 1C→P, 9C→H 
9D LD P,1D LP 1D 01 2 .. 1D→P, 9D→H 
9E LD P,1E LP 1E 01 2 .. 1E→P, 9E→H 
9F LD P,1F LP 1F 01 2 .. 1F→P, 9F→H 
A0 LD P,20 LP 20 01 2 .. 20→P, A0→H 
A1 LD P,21 LP 21 01 2 .. 21→P, A1→H 
A2 LD P,22 LP 22 01 2 .. 22→P, A2→H 
A3 LD P,23 LP 23 01 2 .. 23→P, A3→H 
A4 LD P,24 LP 24 01 2 .. 24→P, A4→H 
A5 LD P,25 LP 25 01 2 .. 25→P, A5→H 
A6 LD P,26 LP 26 01 2 .. 26→P, A6→H 
A7 LD P,27 LP 27 01 2 .. 27→P, A7→H 
A8 LD P,28 LP 28 01 2 .. 28→P, A8→H 
A9 LD P,29 LP 29 01 2 .. 29→P, A9→H 
AA LD P,2A LP 2A 01 2 .. 2A→P, AA→H 
AB LD P,2B LP 2B 01 2 .. 2B→P, AB→H 
AC LD P,2C LP 2C 01 2 .. 2C→P, AC→H 
AD LD P,2D LP 2D 01 2 .. 2D→P, AD→H 
AE LD P,2E LP 2E 01 2 .. 2E→P, AE→H 
AF LD P,2F LP 2F 01 2 .. 2F→P, AF→H 
B0 LD P,30 LP 30 01 2 .. 30→P, B0→H 
B1 LD P,31 LP 31 01 2 .. 31→P, B1→H 
B2 LD P,32 LP 32 01 2 .. 32→P, B2→H 
B3 LD P,33 LP 33 01 2 .. 33→P, B3→H 
B4 LD P,34 LP 34 01 2 .. 34→P, B4→H 
B5 LD P,35 LP 35 01 2 .. 35→P, B5→H 
B6 LD P,36 LP 36 01 2 .. 36→P, B6→H 
B7 LD P,37 LP 37 01 2 .. 37→P, B7→H 
B8 LD P,38 LP 38 01 2 .. 38→P, B8→H 
B9 LD P,39 LP 39 01 2 .. 39→P, B9→H 
BA LD P,3A LP 3A 01 2 .. 3A→P, BA→H 
BB LD P,3B LP 3B 01 2 .. 3B→P, BB→H 
BC LD P,3C LP 3C 01 2 .. 3C→P, BC→H 
BD LD P,3D LP 3D 01 2 .. 3D→P, BD→H 
BE LD P,3E LP 3E 01 2 .. 3E→P, BE→H 
BF LD P,3F LP 3F 01 2 .. 3F→P, BF→H 
C0 INC M INCJ 01 4 cz M+1→M, 1→Q 
C1 DEC M DECJ 01 4 cz M-1→M, 1→Q 
C2 INC E INCB 01 4 cz E+1→E, 3→Q 
C3 DEC E DECB 01 4 cz E-1→E, 3→Q 
C4 ADC(P),A ADCM 01 3 cz (P)+A+c→(P) 
C5 SBC(P),A SBCM 01 3 cz (P)-A-c→(P) 
C6 BIT(P),A TSMA 01 3 .z (P)&A 
C7 CMP(P),A CPMA 01 3 cz (P)-A 
C8 INC C1 INCL 01 4 cz C1+1→C1, 9→Q 
C9 DEC C1 DECL 01 4 cz C1-1→C1, 9→Q 
CA INC C3 INCN 01 4 cz C3+1→C3, 11→Q 
CB DEC C3 DECN 01 4 cz C3-1→C3, 11→Q 
CC LD A,PB INB 01 2 .z Port PB→A 
CD CD CD 
CE DLY 3 NOPT 01 3 .. none alt: 69/6A
CF CF CF 
D0 SET C SC 01 2 11 1→c, 1→z 
D1 CLR C RC 01 2 01 0→c, 1→z 
D2 ROR A SR 01 2 c. A>>1, c→A0, A7→c 
D3 D3 D3 
D4 XX AND(X),n ANID n 02 6 .z (X)&n→(X), (X)→(SP-1) (SP-1) used
D5 XX OR(X),n ORID n 02 6 .z (X)|n→(X), (X)→(SP-1) (SP-1) used
D6 XX BIT(X),n TSID n 02 6 .z (X)&n, (X)→(SP-1) (SP-1) used
D7 D7 D7 01 6? cz (X)-n (SP-1) used, may not be fully implemented
D8 CLR(SP) LEAVE 01 2 .. 0→(SP) (SP-1) used
D9 D9 D9 
DA EX A,E EXAB 01 3 .. A↔E 
DB EX A,(P) EXAM 01 3 .. A↔(P) 
DC DC DC 
DD OUT PB OUTB 01 2 .. (5D)→Port PB, 5D→Q (?) 
DE DE DE 
DF OUT CR OUTC 01 2 .. (5F)→Port CR 
E0 XX JSR 00n CAL 00n 02 7 .. PC+2→(SP-1,SP-2), SP-2→SP, 00n →PC 
E1 XX JSR 01n CAL 01n 02 7 .. PC+2→(SP-1,SP-2), SP-2→SP, 01n →PC 
E2 XX JSR 02n CAL 02n 02 7 .. PC+2→(SP-1,SP-2), SP-2→SP, 02n →PC 
E3 XX JSR 03n CAL 03n 02 7 .. PC+2→(SP-1,SP-2), SP-2→SP, 03n →PC 
E4 XX JSR 04n CAL 04n 02 7 .. PC+2→(SP-1,SP-2), SP-2→SP, 04n →PC 
E5 XX JSR 05n CAL 05n 02 7 .. PC+2→(SP-1,SP-2), SP-2→SP, 05n →PC 
E6 XX JSR 06n CAL 06n 02 7 .. PC+2→(SP-1,SP-2), SP-2→SP, 06n →PC 
E7 XX JSR 07n CAL 07n 02 7 .. PC+2→(SP-1,SP-2), SP-2→SP, 07n →PC 
E8 XX JSR 08n CAL 08n 02 7 .. PC+2→(SP-1,SP-2), SP-2→SP, 08n →PC 
E9 XX JSR 09n CAL 09n 02 7 .. PC+2→(SP-1,SP-2), SP-2→SP, 09n →PC 
EA XX JSR 0An CAL 0An 02 7 .. PC+2→(SP-1,SP-2), SP-2→SP, 0An →PC 
EB XX JSR 0Bn CAL 0Bn 02 7 .. PC+2→(SP-1,SP-2), SP-2→SP, 0Bn →PC 
EC XX JSR 0Cn CAL 0Cn 02 7 .. PC+2→(SP-1,SP-2), SP-2→SP, 0Cn →PC 
ED XX JSR 0Dn CAL 0Dn 02 7 .. PC+2→(SP-1,SP-2), SP-2→SP, 0Dn →PC 
EE XX JSR 0En CAL 0En 02 7 .. PC+2→(SP-1,SP-2), SP-2→SP, 0En →PC 
EF XX JSR 0Fn CAL 0Fn 02 7 .. PC+2→(SP-1,SP-2), SP-2→SP, 0Fn →PC 
F0 XX JSR 10n CAL 10n 02 7 .. PC+2→(SP-1,SP-2), SP-2→SP, 10n →PC 
F1 XX JSR 11n CAL 11n 02 7 .. PC+2→(SP-1,SP-2), SP-2→SP, 11n →PC 
F2 XX JSR 12n CAL 12n 02 7 .. PC+2→(SP-1,SP-2), SP-2→SP, 12n →PC 
F3 XX JSR 13n CAL 13n 02 7 .. PC+2→(SP-1,SP-2), SP-2→SP, 13n →PC 
F4 XX JSR 14n CAL 14n 02 7 .. PC+2→(SP-1,SP-2), SP-2→SP, 14n →PC 
F5 XX JSR 15n CAL 15n 02 7 .. PC+2→(SP-1,SP-2), SP-2→SP, 15n →PC 
F6 XX JSR 16n CAL 16n 02 7 .. PC+2→(SP-1,SP-2), SP-2→SP, 16n →PC 
F7 XX JSR 17n CAL 17n 02 7 .. PC+2→(SP-1,SP-2), SP-2→SP, 17n →PC 
F8 XX JSR 18n CAL 18n 02 7 .. PC+2→(SP-1,SP-2), SP-2→SP, 18n →PC 
F9 XX JSR 19n CAL 19n 02 7 .. PC+2→(SP-1,SP-2), SP-2→SP, 19n →PC 
FA XX JSR 1An CAL 1An 02 7 .. PC+2→(SP-1,SP-2), SP-2→SP, 1An →PC 
FB XX JSR 1Bn CAL 1Bn 02 7 .. PC+2→(SP-1,SP-2), SP-2→SP, 1Bn →PC 
FC XX JSR 1Cn CAL 1Cn 02 7 .. PC+2→(SP-1,SP-2), SP-2→SP, 1Cn →PC 
FD XX JSR 1Dn CAL 1Dn 02 7 .. PC+2→(SP-1,SP-2), SP-2→SP, 1Dn →PC 
FE XX JSR 1En CAL 1En 02 7 .. PC+2→(SP-1,SP-2), SP-2→SP, 1En →PC 
FF XX JSR 1Fn CAL 1Fn 02 7 .. PC+2→(SP-1,SP-2), SP-2→SP, 1Fn →PC
The information about clock, flags and effect is based on the information on the page utz82 - SC61860-Instruction-Set and was converted to the PKS-naming.
Internal RAM / register
The ESR-H SC61860 has 96 byte iternal ram that is used for regoisters and the stack:
Adress	PKS	ERS-H	Len
00	L	I	Loop-register 1
01	M	J	Loop-register 2
02	A	A	Accu
03	E	B	Extended accu
04 / 05	S(l) / S(h)	X(l) / X(h)	16 bit RAM pointer (source)
06 / 07	D(l) / D(h)	Y(l) / Y(h)	16 bit RAM pointer (destination)
08 - 0B	C0 - C3	K - N	Counter 0-3
0C - 5B	Stack	Stack
5C	PAB	IA	Port A buffer
5D	PBB	IB	Port B buffer
5E	PCB	FO	Port C buffer
5F	CRB	COUT	Control-register buffer

Additional registers and flags
	PC	PC	Programmcounter (16 bit)
	X	DP	X-register (16 bit)
	P	P	Pointer-register 1 (7 bit)
	Q	Q	Pointer-register 2 (7 bit)
	SP	R	Stack-pointer (7 bit)
	Z	Z	Zero-flag
	C	C	Carry-flag
......
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Author: Bernhard Schwall	last change: 01.01.2026